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74AUP1G132產(chǎn)品應用圖解:
74AUP1G132產(chǎn)品封裝圖一
74AUP1G132產(chǎn)品封裝圖二
74AUP1G132產(chǎn)品封裝圖三
74AUP1G132產(chǎn)品封裝圖四
74AUP1G132產(chǎn)品封裝圖五
NXP產(chǎn)品 - 74AUP1G132介紹
74AUP1G132 - Low-power 2-input NAND Schmitt trigger

74AUP1G132是NXP公司的一款施密特觸發(fā)器產(chǎn)品,74AUP1G132是Low-power 2-input NAND Schmitt trigger,本站介紹了74AUP1G132的封裝應用圖解、特點和優(yōu)點、功能等,并給出了與74AUP1G132相關(guān)的NXP元器件型號供參考。

74AUP1G132 - Low-power 2-input NAND Schmitt trigger - 施密特觸發(fā)器 - 邏輯 - 恩智浦, LLC

產(chǎn)品描述

The 74AUP1G132 provides the single 2-input NAND Schmitt trigger function which accept standard input signals. They are capable of transforming slowly changing input signals into sharply defined, jitter-free output signals.

This device ensures a very low static and dynamic power consumption across the entire VCC range from 0.8 V to 3.6 V.

This device is fully specified for partial Power-down applications using IOFF. The IOFF circuitry disables the output, preventing the damaging backflow current through the device when it is powered down.

The inputs switch at different points for positive and negative-going signals. The difference between the positive voltage VT+ and the negative voltage VT- is defined as the input hysteresis voltage VH.

產(chǎn)品特性和優(yōu)勢
  • Wide supply voltage range from 0.8 V to 3.6 V
  • High noise immunity
  • ESD protection:
    • HBM JESD22-A114F Class 3A exceeds 5000 V
    • MM JESD22-A115-A exceeds 200 V
    • CDM JESD22-C101E exceeds 1000 V
  • Low static power consumption; ICC = 0.9 μA (maximum)
  • Latch-up performance exceeds 100 mA per JESD 78 Class II
  • Inputs accept voltages up to 3.6 V
  • Low noise overshoot and undershoot < 10 % of VCC
  • IOFF circuitry provides partial Power-down mode operation
  • Multiple package options
  • Specified from -40 °C to +85 °C and -40 °C to +125 °C
產(chǎn)品應用
  • Wave and pulse shaper
  • Astable multivibrator
  • Monostable multivibrator
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