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74AUP2G04GX產(chǎn)品應用圖解:
74AUP2G04GX產(chǎn)品封裝圖一
NXP產(chǎn)品 - 74AUP2G04GX介紹
74AUP2G04GX - Low-power dual inverter

74AUP2G04GX是NXP公司的一款緩沖器/驅(qū)動器產(chǎn)品,74AUP2G04GX是Low-power dual inverter,本站介紹了74AUP2G04GX的封裝應用圖解、特點和優(yōu)點、功能等,并給出了與74AUP2G04GX相關的NXP元器件型號供參考。

74AUP2G04GX - Low-power dual inverter - 緩沖器/驅(qū)動器 - 邏輯 - 恩智浦, LLC

產(chǎn)品描述

The 74AUP2G04 provides two inverting buffers.

Schmitt trigger action at all inputs makes the circuit tolerant of slower input rise and fall times across the entire VCC range from 0.8 V to 3.6 V.

This device ensures a very low static and dynamic power consumption across the entire VCC range from 0.8 V to 3.6 V.

This device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing the damaging backflow current through the device when it is powered down.

產(chǎn)品特性和優(yōu)勢
  • Wide supply voltage range from 0.8 V to 3.6 V
  • High noise immunity
  • Complies with JEDEC standards:
    • JESD8-12 (0.8 V to 1.3 V)
    • JESD8-11 (0.9 V to 1.65 V)
    • JESD8-7 (1.2 V to 1.95 V)
    • JESD8-5 (1.8 V to 2.7 V)
    • JESD8-B (2.7 V to 3.6 V)
  • ESD protection:
    • HBM JESD22-A114F Class 3A exceeds 5000 V
    • MM JESD22-A115-A exceeds 200 V
    • CDM JESD22-C101E exceeds 1000 V
  • Low static power consumption; ICC = 0.9 μA (maximum)
  • Latch-up performance exceeds 100 mA per JESD 78 Class II
  • Inputs accept voltages up to 3.6 V
  • Low noise overshoot and undershoot <10 % of VCC
  • IOFF circuitry provides partial Power-down mode operation
  • Multiple package options
  • Specified from -40 °C to +85 °C and -40 °C to +125 °C
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