74AUP2G97DP是NXP公司的一款可配置門產(chǎn)品，74AUP2G97DP是Low-power dual PCB configurable multiple function gate，本站介紹了74AUP2G97DP的封裝應(yīng)用圖解、特點(diǎn)和優(yōu)點(diǎn)、功能等，并給出了與74AUP2G97DP相關(guān)的NXP元器件型號供參考。
74AUP2G97DP - Low-power dual PCB configurable multiple function gate - 可配置門 - 門 - 恩智浦, LLC
The 74AUP2G97 is a dual configurable multiple function gate with Schmitt-trigger inputs.Each gate within the device can be configured as any of the following logic functionsMUX, AND, OR, NAND, NOR, inverter and buffer; using the 3-bit input. All inputs can beconnected directly to VCC or GND.
This device ensures very low static and dynamic power consumption across the entireVCC range from 0.8 V to 3.6 V.
This device is fully specified for partial power down applications using IOFF. The IOFFcircuitry disables the output, preventing the potentially damaging backflow current throughthe device when it is powered down.
- Wide supply voltage range from 0.8 V to 3.6 V
- High noise immunity
- ESD protection:
- HBM JESD22-A114F exceeds 5000 V
- MM JESD22-A115-A exceeds 200 V
- CDM JESD22-C101E exceeds 1000 V
- Low static power consumption; ICC = 0.9 μA (maximum)
- Latch-up performance exceeds 100 mA per JESD 78 Class II
- Inputs accept voltages up to 3.6 V
- Low noise overshoot and undershoot < 10 % of VCC
- IOFF circuitry provides partial power-down mode operation
- Multiple package options
- Specified from ?40 °C to +85 °C and ?40 °C to +125 °C
