NXP（恩智浦）|NXP產(chǎn)品型號搜索
74AXP1G11技術(shù)文檔下載：
74AXP1G11產(chǎn)品應(yīng)用圖解：
74AXP1G11 - Low-power 3-input AND gate
74AXP1G11是NXP公司的一款與門產(chǎn)品，74AXP1G11是Low-power 3-input AND gate，本站介紹了74AXP1G11的封裝應(yīng)用圖解、特點和優(yōu)點、功能等，并給出了與74AXP1G11相關(guān)的NXP元器件型號供參考。
74AXP1G11 - Low-power 3-input AND gate - 與門 - 門 - 恩智浦, LLC
產(chǎn)品描述
The 74AXP1G11 is a single 3-input AND gate.
Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise andfall times.
This device ensures very low static and dynamic power consumption across the entireVCC range from 0.7 V to 2.75 V. It is fully specified for partial powerdown applications using IOFF. The IOFF circuitry disables theoutput, preventing the potentially damaging backflow current through the device when itis powered down.
產(chǎn)品特性和優(yōu)勢
- Wide supply voltage range from 0.7 V to 2.75 V
- Low input capacitance; CI = 0.5 pF (typical)
- Low output capacitance; CO = 1.0 pF (typical)
- Low dynamic power consumption; CPD = 2.6 pF at VCC = 1.2 V(typical)
- Low static power consumption; ICC = 0.6 μA (85 °C maximum)
- High noise immunity
- Complies with JEDEC standard:
- JESD8-12A.01 (1.1 V to 1.3 V)
- JESD8-11A.01 (1.4 V to 1.6 V)
- JESD8-7A (1.65 V to 1.95 V)
- JESD8-5A.01 (2.3 V to 2.7 V)
- ESD protection:
- HBM ANSI/ESDA/JEDEC JS-001 Class 2 exceeds 2 kV
- CDM JESD22-C101E exceeds 1000 V
- Latch-up performance exceeds 100 mA per JESD 78 Class II
- Inputs accept voltages up to 2.75 V
- Low noise overshoot and undershoot < 10 % of VCC
- IOFF circuitry provides partial Power-down mode operation
- Multiple package options
- Specified from -40 °C to +85 °C
下面可能是您感興趣的NXP公司與門元器件
NXP公司產(chǎn)品現(xiàn)貨專家，訂購NXP公司產(chǎn)品不限最低起訂量，NXP芯片大陸現(xiàn)貨即時發(fā)貨，香港庫存3-5天發(fā)貨，海外庫存7-10天發(fā)貨
尋找全球NXP代理商現(xiàn)貨貨源 - NXP公司（恩智浦）電子元件在線訂購