This 14-bit bus switch/multiplexer (MUX) is designed for 1.5 V or 1.8 V supply voltageoperation, POD_12, SSTL_12, SSTL_135, SSTL_15 or SSTL_18 signaling and CMOSselect input levels. It is designed for operation in DDR2, DDR3 or DDR4 memory bussystems.

The CBTW28DD14 has a 1 : 2 switch or 2 : 1 multiplex topology and offers a 14-bit widebus. Each 14-bit wide A-port can be switched to one of two ports B and C, for all bitssimultaneously. The selection of the port is by a simple CMOS input (SELect). AnotherCMOS input (ENable) is available to allow all ports to be disconnected. Each port isnon-directional due to the use of FET switches, allowing a multitude of applicationsrequiring high-bandwidth switching or multiplexing.

The SEL and EN input signals are designed to operate transparently as CMOS input levelsignals in both 1.5 V and 1.8 V supply voltage conditions.

CBTW28DD14 uses NXP proprietary high-speed switch architecture providing highbandwidth, very little insertion loss at low frequency, and very low propagation delay,allowing use in many applications requiring switching or multiplexing of high-speedsignals. It is available in a 4.5 mm x 4.5 mm TFBGA48 package with 0.5 mm ball pitch, foroptimal size versus board layout density considerations. It is characterized for operationfrom -10 °C to +85 °C.

Topology

• 14-bit bus width
• 1 : 2 switch/MUX topology
• Bidirectional operation
• Simple CMOS select pin (SEL)
• Simple CMOS enable pin (EN)

Performance

• 2.5 GHz bandwidth
• Low ON insertion loss
• Low crosstalk
• High OFF isolation
• POD_12, SSTL_12, SSTL_135, SSTL_15 or SSTL_18 signaling
• Low RON (10 ? typical)

General attributes

• 1.5 V or 1.8 V supply voltage operation
• Very low supply current (300 μA typical)
• ESD robustness exceeds 3 kV HBM, 1 kV CDM
• Available in TFBGA48 package, 4.5 mm × 4.5 mm × 0.8 mm size, 0.5 mm pitch, Pb-free/Dark Green

• DDR2/DDR3/DDR4 memory bus systems
• Systems requiring high-speed multiplexing